DP83865DVH

DP83865DVH fully featured Physical Layer transceiver

Rated 5 Rating 5 | reviews | Write a review

Price:: US $1.00~2.00 / piece [Get Latest Price]

Reference price:

Qty (lots)	Price/lot
1 ~ 100 :	2.00 / Piece
101 ~ 500 :	1.00 / Piece

PartNumber:: DP83865DVH

Brand:: National Semiconductor - NS | D/C:

Availability:: Supply Ability: 500/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

Quantity:: piece

Total Price:: US $0

Place Order via Escrow Service

Not exactly what you want? Post a quick Buying Request!

Sold By

Mr. huihuiyan's store

(China (Mainland))

100% Positive feedback

Detailed seller ratings

Visit Store

Contact Now

Esrcow Service

Place orders confidently and securely via it

Safe payments
Quick and easy transactions
Free service charges

Learn More >>

Previous Next

Products Upload time: 2013-11-01

From Other Seller

Part Number:DP83865DVH
US $1.00 - 2.00
Quantity:

piece

Product Summary

The DP83865 is a fully featured Physical Layer transceiverwith integrated PMD sublayers to support 10BASE-T,100BASE-TX and 1000BASE-T Ethernet protocols.The DP83865 is an ultra low power version of the DP83861and DP83891. It uses advanced 0.18 um, 1.8 V CMOStechnology, fabricated at National Semiconductor’s SouthPortland, Maine facility

Parametrics

Specifications of DP83865DVH
Data Rate 1000Mbps No. Of Ports 1
Ethernet Type IEEE 802.3u, IEEE 802.3z Supply Current 430?μA
Supply Voltage Range 2.375V To 2.625V, 3.135V To 3.465V Operating Temperature Range 0?°C To +70?°C
Interface Type GMII, MII, RGMII Rohs Compliant Yes
Leaded Process Compatible No Peak Reflow Compatible (260 C) No
Lead Free Status / RoHS Status Lead free / RoHS Compliant

Features

Ultra low power consumption typically 1.1 wattFully compliant with IEEE 802.3 10BASE-T, 100BASE-TX and 1000BASE-T specifications Integrated PMD sublayer featuring adaptive equalizationand baseline wander compensation according to ANSIX3.T123.3 V or 2.5 V MAC interfaces:IEEE 802.3u MIIIEEE 802.3z GMII RGMII version 1.3 User programmable GMII pin ordering IEEE 802.3u Auto-Negotiation and Parallel Detection Fully Auto-Negotiates between 1000 Mb/s, 100 Mb/s, and 10 Mb/s full duplex and half duplex devices Speed Fallback mode to achieve quality link of existing Cable length estimator LED support for activity, full / half duplex, link1000, link100 and link10, user programmable (manual on/off), or reduced LED mode Supports 25 MHz operation with crystal or oscillator. Requires only two power supplies, 1.8 V (core and analog) and 2.5 V (analog and I/O). 3.3V is supported as an alternative supply for I/O voltage User programable interrupt Supports Auto-MDIX at 10, 100 and 1000 Mb/s Supports JTAG (IEEE1149.1) 128-pin PQFP package (14mm x 20mm)